The Ben Eater computer is an interesting starting point. With a few modifications, such as an extended program counter / address bus, a combinatorial ALU programmed in flash, and a few more registers, it can be upgraded to a more powerful, if slow, computer.
Further, these circuits can be directly simulated in an FPGA if you want to teach yourself an HDL like VHDL or Verilog. You really want to learn better and faster ways to organize a CPU, but it's a fun way for a beginner to bridge into this kind of work.
At the local hackerspace, we actually taught a class that assembled a hybrid 8-bit / 16-bit variation of this computer with 1MB of RAM, an 8-bit ALU, a 16-bit data bus / registers, and a 20-bit address bus. With this additional capability, we could program it over serial with a very basic bootloader, and it was powerful enough to compute pi to 1000 digits. Granted, this took about 18 hours, but it could have run faster with a printed circuit board and a crystal oscillator. We just never really got to that point.
As for how powerful such a computer with discrete logic can be, consider that the KB-11A CPU for the PDP-11/45 was built using 74-series logic ICs. It wasn't until after this system that DEC moved on to VSLI. So, this is a way to play with technology found in computers in 1972 / 1973.
As a stepping stone to digital logic and FPGA work, Ben Eater's tutorial isn't bad. Just get yourself a copy of Don Lancaster's TTL Cookbook or CMOS Cookbook to bring his tutorial up to best practices.
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