This is pretty cool! There are a lot of things for which a little bit of fast, deterministic digital logic is strongly synergistic with the much more flexible, but slower, more power-hungry, and less predictable, programmability of a microcontroller. Much less headache to wire up a custom logic circuit than to paw through hundreds of pages of register maps and errata for various peripherals that almost do what you need. The RP2040's pioasm coprocessor is another approach to the problem.
However, Microchip don't seem to be taking advantage of the CLB to omit the usual panoply of hardwired peripherals for things like SPI, I²C, LINbus, PWM generators, etc.
I didn't expect that Microchip would be using Yosys for this.
The propagation delay through all 32 BLEs was 232ns, 7.5ns per BLE, within the 5–8ns typical range given in table 41-25 on p. 559 of the datasheet. (Quoted in the linked post in a way that suggests I might be misunderstanding it!) That's a little faster than is typical for CMOS discrete logic, but five times slower than TI's datasheet number for a 74AUC04. But it's still a hell of a lot faster than interrupt handling latency or even the 125ns minimum instruction time in the PIC16F13145 datasheet. They say it can work up to 100MHz in asynchronous mode, but I feel like that depends on single-BLE path lengths, and they say that you can't clock the BLEs' flip-flops over 16MHz.
So, what is this good for? It can't do DMA or FIFOs like pioasm. I feel like you could maybe get some mileage out of it for things like pulse density modulation, fast quadrature pulse up-down counting, LFSR noise generation, waking from sleep with complex conditions, and driving WS2812 waveforms, but I don't have a good enough sense of how the rest of the chip is set up to know if that makes sense.
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